I2C (also referred to as I2C) is a multi-master serial single-ended control data bus used for attaching low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic devices. The I2C control data bus includes a clock (SCL) and data (SDA) lines with 7-bit addressing. The control data bus has two roles for nodes: master and slave. A master node is a node that generates the clock and initiates communication with slave nodes. A slave node is a node that receives the clock and responds when addressed by the master. The I2C control data bus is a multi-master control data bus which means any number of master nodes can be present. Additionally, master and slave roles may be changed between messages. I2C defines basic types of messages, each of which begins with a START and ends with a STOP.
In this context of a camera implementation, unidirectional transmissions may be used to capture an image from a sensor and transmit such image data to memory in a baseband processor, while control data may be exchanged between the baseband processor and the sensor as well as other peripheral devices. In one example, a Camera Control Interface (CCI) protocol may be used for such control data between the baseband processor and the image sensor (and/or one or more slave nodes). In one example, the CCI protocol may be implemented over an I2C serial control data bus between the image sensor and the baseband processor.
Master devices control access to the control data bus. While some slave devices may have the capability of switching to a master mode of operation, other slave devices cannot operate in the master mode. One major distinction between a slave-only slave device versus a master-capable slave device is the ability to receive (e.g., handle) interrupts on an interrupt request line (IRQ). The slave-only slave devices can cause/send interrupts but cannot handle such interrupts. Therefore, because interrupt handling is extremely important, heretofore slave devices cannot communicate directly with other slave devices. Accordingly, it would be desirable to enable slave device to slave device communications over a shared data bus controlled by a master device.